Design-Reuse

A Low Complexity Parallel Architecture of Turbo Decoder Based on QPP Interleaver for 3GPP-LTE/LTE-A

This paper propose an improved method called the modified warm-up-free parallel window(PW) MAP decoding schemes to implement highly-parallel Turbo decoder architecture based on the QPP(Quadratic ...
EDN

Efficient UMTS Turbo MAP decoding on a DSP

This article focuses on techniques to decode UMTS Turbo codes efficiently using a general purpose DSP processor with MAP (maximum a posterior) decoding algorithm. Since MAP decoding is costly both in ...
EDN

Turbo-product codes advance ECC technology

Communication-system designers have always had to deal with trade-offs among data reliability, efficient use of available spectrum, data throughput, and cost. Error-correction coding (ECC) is one of ...
Nature

Turbo Decoding and High Throughput Communication Systems

Turbo decoding stands as a pivotal technique in modern communications, enabling near-capacity error correction through iterative decoding processes. By combining ...
Design-Reuse

Unified C-programmable ASIP architecture for multi-standard Viterbi, Turbo and LDPC decoding

This paper describes an ASIP decoder template suitable for multi-standard Viterbi, Turbo and LDPC decoding. We show architecture fitness for WLAN, WiMAX and 3GPPLTE standards, although various other ...